Belle II PXD ASIC Review II

Contribution List

0. Introduction, Schedule, Overview

Laci Andricek (MPG Halbleiterlabor)

15/07/2015, 10:00

1. DEPFET Drain Current Dispersion - What to expect

Rainer Richter (MPG HLL)

15/07/2015, 10:20

2. DEPFET Drain Current Dispersion - impact on Dynamic Range

Florian Luetticke (Uni Bonn)

15/07/2015, 10:40

3. Summary of the recent X-Ray irradiation campaign

Benjamin Schwenker (University of Göttingen)

15/07/2015, 11:20

4. Gated Mode seen from the DCD/DHP and SWB perspective

Christian Koffmane (MPI Halbleiterlabor)

15/07/2015, 11:40

5. DCD-DHPT Interface & DHPT Re-design Status

Hans Krueger (Uni Bonn)

15/07/2015, 13:00

7. DCD - Status and Plans

Ivan Peric (KIT)

15/07/2015, 14:20

8. SwitcherB - Status and Plans

Ivan Peric (KIT)

15/07/2015, 15:05

9. Closed Session

15/07/2015, 15:50

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