Introduction to FPGA Programming

Contribution List

1. Lesson 1: Digital Systems, FPGAs and HDL

Davide Cieri (Max-Planck-Institut für Physik )

26/08/2024, 09:00

2. Lab 1: First Look at Vivado

26/08/2024, 09:45

3. Lab 2: Simulating an HDL design with Vivado and GHDL

26/08/2024, 10:05

4. Lesson 2: VHDL Fundamentals

Davide Cieri (Max-Planck-Institut für Physik )

26/08/2024, 11:30

5. Lab 3: Wiring Switches to LEDs

26/08/2024, 12:00

6. Lesson 3: Boolean Algebra, Look-up Tables and IOs

Davide Cieri (Max-Planck-Institut für Physik )

27/08/2024, 09:00

7. Lab 4: Wiring Switches to LED (part II)

27/08/2024, 09:30

8. Lab 5: Implement a Full Adder

27/08/2024, 10:00

9. Lab 6: Hierarchical Design

27/08/2024, 10:20

10. Lesson 4: Sequential Logic and Flip-Flops

27/08/2024, 11:30

11. Lab 7: Counters and Debouncing

27/08/2024, 12:00

12. Lab 8: An LED Blinker

27/08/2024, 12:30

13. Lesson 5: Types, Arrays and Arithmetic Functions

Davide Cieri (Max-Planck-Institut für Physik )

28/08/2024, 09:00

14. Lab 9: Design an Arithmetic Logic Unit

28/08/2024, 09:30

15. Lesson 6: VHDL Simulation

28/08/2024, 11:00

16. Lab 10: Testbench Coding

28/08/2024, 11:40

17. Lesson 7: Storing Data on FPGAs

29/08/2024, 09:00

18. Lab 11: Trigonometric Functions on FPGA

29/08/2024, 09:30

19. Lesson 8: Packages, Libraries and Parametrisation

29/08/2024, 10:35

20. Lab 12: Packages and libraries

29/08/2024, 11:05

21. Lab 13: Parameters and Parametised Generation

29/08/2024, 11:35

24. Lesson 10: IP Blocks

29/08/2024, 12:05

25. Lab 16: Using IPs

29/08/2024, 12:25

22. Lesson 9: Finite State Machines

Davide Cieri (Max-Planck-Institut für Physik )

30/08/2024, 09:00

23. Lab 14: Improve the Traffic Light

30/08/2024, 09:30

26. Lesson 11: Timing on FPGAs

30/08/2024, 10:00

27. Lab 17: Timing Constraints

30/08/2024, 11:00

28. Lab 18: Generating Clocks

30/08/2024, 11:20

29. Lesson 13: External Interfaces

30/08/2024, 11:50

30. Lab 20: UART Transmitter

30/08/2024, 12:20