Introduction to FPGA Programming
from
Monday, 2 September 2024 (09:00)
to
Friday, 13 September 2024 (15:00)
Monday, 2 September 2024
09:00
Lesson 1: Digital Systems, FPGAs and HDL
-
Davide Cieri
(
Max-Planck-Institut für Physik
)
Lesson 1: Digital Systems, FPGAs and HDL
Davide Cieri
(
Max-Planck-Institut für Physik
)
09:00 - 09:45
Room: A.1.01/03 - Alps
09:45
Lab 1: First Look at Vivado
Lab 1: First Look at Vivado
09:45 - 10:05
Room: A.1.01/03 - Alps
10:05
Lab 2: Simulating an HDL design with Vivado and GHDL
Lab 2: Simulating an HDL design with Vivado and GHDL
10:05 - 11:00
Room: A.1.01/03 - Alps
11:00
Coffee break
Coffee break
11:00 - 11:30
Room: A.1.01/03 - Alps
11:30
Lesson 2: VHDL Fundamentals
-
Davide Cieri
(
Max-Planck-Institut für Physik
)
Lesson 2: VHDL Fundamentals
Davide Cieri
(
Max-Planck-Institut für Physik
)
11:30 - 12:00
Room: A.1.01/03 - Alps
12:00
Lab 3: Wiring Switches to LEDs
Lab 3: Wiring Switches to LEDs
12:00 - 12:30
Room: A.1.01/03 - Alps
Tuesday, 3 September 2024
09:00
Lesson 3: Boolean Algebra, Look-up Tables and IOs
-
Davide Cieri
(
Max-Planck-Institut für Physik
)
Lesson 3: Boolean Algebra, Look-up Tables and IOs
Davide Cieri
(
Max-Planck-Institut für Physik
)
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 4: Wiring Switches to LED (part II)
Lab 4: Wiring Switches to LED (part II)
09:30 - 10:00
Room: A.1.01/03 - Alps
10:00
Lab 5: Implement a Full Adder
Lab 5: Implement a Full Adder
10:00 - 10:20
Room: A.1.01/03 - Alps
10:20
Lab 6: Hierarchical Design
Lab 6: Hierarchical Design
10:20 - 11:00
Room: A.1.01/03 - Alps
11:00
Coffee Break
Coffee Break
11:00 - 11:30
Room: A.1.01/03 - Alps
11:30
Lesson 4: Sequential Logic and Flip-Flops
Lesson 4: Sequential Logic and Flip-Flops
11:30 - 12:00
Room: A.1.01/03 - Alps
12:00
Lab 7: Counters and Debouncing
Lab 7: Counters and Debouncing
12:00 - 12:30
Room: A.1.01/03 - Alps
12:30
Lab 8: An LED Blinker
Lab 8: An LED Blinker
12:30 - 13:00
Room: A.1.01/03 - Alps
Wednesday, 4 September 2024
09:00
Lesson 5: Types, Arrays and Arithmetic Functions
-
Davide Cieri
(
Max-Planck-Institut für Physik
)
Lesson 5: Types, Arrays and Arithmetic Functions
Davide Cieri
(
Max-Planck-Institut für Physik
)
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 9: Design an Arithmetic Logic Unit
Lab 9: Design an Arithmetic Logic Unit
09:30 - 10:30
Room: A.1.01/03 - Alps
10:30
Coffee Break
Coffee Break
10:30 - 11:00
Room: A.1.01/03 - Alps
11:00
Lesson 6: VHDL Simulation
Lesson 6: VHDL Simulation
11:00 - 11:40
Room: A.1.01/03 - Alps
11:40
Lab 10: Testbench Coding
Lab 10: Testbench Coding
11:40 - 12:40
Room: A.1.01/03 - Alps
Thursday, 5 September 2024
09:00
Lesson 7: Storing Data on FPGAs
Lesson 7: Storing Data on FPGAs
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 11: Trigonometric Functions on FPGA
Lab 11: Trigonometric Functions on FPGA
09:30 - 10:30
Room: A.1.01/03 - Alps
10:30
Coffee Break
Coffee Break
10:30 - 11:00
Room: A.1.01/03 - Alps
11:00
Lesson 8: Packages, Libraries and Parametrisation
Lesson 8: Packages, Libraries and Parametrisation
11:00 - 11:30
Room: A.1.01/03 - Alps
11:30
Lab 12: Packages and libraries
Lab 12: Packages and libraries
11:30 - 12:00
Room: A.1.01/03 - Alps
12:00
Lab 13: Parameters and Parametised Generation
Lab 13: Parameters and Parametised Generation
12:00 - 12:30
Room: A.1.01/03 - Alps
Friday, 6 September 2024
09:00
Lesson 9: Finite State Machines
-
Davide Cieri
(
Max-Planck-Institut für Physik
)
Lesson 9: Finite State Machines
Davide Cieri
(
Max-Planck-Institut für Physik
)
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 14: Improve the Traffic Light
Lab 14: Improve the Traffic Light
09:30 - 10:00
Room: A.1.01/03 - Alps
10:00
Lesson 9a: The 7-segment Display
Lesson 9a: The 7-segment Display
10:00 - 10:20
Room: A.1.01/03 - Alps
10:20
Coffee Break
Coffee Break
10:20 - 10:50
Room: A.1.01/03 - Alps
10:50
Lab 15: Design a Stopwatch
Lab 15: Design a Stopwatch
10:50 - 12:50
Room: A.1.01/03 - Alps
Saturday, 7 September 2024
Sunday, 8 September 2024
Monday, 9 September 2024
09:00
Lesson 10: IP Blocks
Lesson 10: IP Blocks
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 16: Using IPs
Lab 16: Using IPs
09:30 - 10:00
Room: A.1.01/03 - Alps
10:00
Lesson 11: Timing on FPGAs
Lesson 11: Timing on FPGAs
10:00 - 10:45
Room: A.1.01/03 - Alps
10:45
Coffee Break
Coffee Break
10:45 - 11:15
Room: A.1.01/03 - Alps
11:15
Lab 17: Timing Constraints
Lab 17: Timing Constraints
11:15 - 11:45
Room: A.1.01/03 - Alps
11:45
Lab 18: Generating Clocks
Lab 18: Generating Clocks
11:45 - 12:30
Room: A.1.01/03 - Alps
Tuesday, 10 September 2024
09:00
Lesson 12: Hardware Debugging
Lesson 12: Hardware Debugging
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 19: Hardware Debugging
Lab 19: Hardware Debugging
09:30 - 10:30
Room: A.1.01/03 - Alps
10:30
Coffee Break
Coffee Break
10:30 - 11:00
Room: A.1.01/03 - Alps
11:00
Lesson 14: Advanced Vivado Flow
Lesson 14: Advanced Vivado Flow
11:00 - 11:30
Room: A.1.01/03 - Alps
11:30
Lab 22: Advanced Vivado Flow
Lab 22: Advanced Vivado Flow
11:30 - 12:30
Room: A.1.01/03 - Alps
Wednesday, 11 September 2024
09:00
Lesson 13: External Interfaces
Lesson 13: External Interfaces
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 20: UART Transmitter
Lab 20: UART Transmitter
09:30 - 10:30
Room: A.1.01/03 - Alps
10:30
Coffee Break
Coffee Break
10:30 - 11:00
Room: A.1.01/03 - Alps
11:00
Lesson 13a: VGA Screens
Lesson 13a: VGA Screens
11:00 - 11:30
Room: A.1.01/03 - Alps
11:30
Lab 21. Connect to the VGA Display
Lab 21. Connect to the VGA Display
11:30 - 12:30
Room: A.1.01/03 - Alps
Thursday, 12 September 2024
09:00
Lesson 15: Processors on FPGA
Lesson 15: Processors on FPGA
09:00 - 09:30
Room: A.1.01/03 - Alps
09:30
Lab 23: Implementing a Microblaze soft processor
Lab 23: Implementing a Microblaze soft processor
09:30 - 10:30
Room: A.1.01/03 - Alps
10:30
Coffee Break
Coffee Break
10:30 - 11:00
Room: A.1.01/03 - Alps
11:00
Lesson 16: Advanced FPGA topics
Lesson 16: Advanced FPGA topics
11:00 - 12:00
Room: A.1.01/03 - Alps
Friday, 13 September 2024
09:00
Course Examination
Course Examination
09:00 - 11:00
Room: A.1.01/03 - Alps